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### » DVM Test Report: FindACSteadyState|DC Input|POP-AC

Test Details |
Schematic | 5_multi_tone.sxsch
Test | FindACSteadyState|DC Input|POP-AC
Date / Time | 11/17/2016 11:13 AM
Report Directory | DVM_REPORTS\2016-11-17-11_12_AM\FindACSteadyState\DC Input\POP-AC
Log File | report.txt
Screenshot | schematic.png
Status | PASS
Simulator | simplis
Deck | input.deck
Init | input.deck.init
Measured Scalar Values |
Frequency(SRC) | 50
ILOAD | MIN 500.079m MAX 500.214m
ISRC | MIN 1.81368 MAX 1.81468
VLOAD | MIN 400.063 MAX 400.171
VLOAD %_diff_last_2_linecycles | 0.000000753023%
VLOAD At Simulation Start Time | AVG 400.082
VLOAD Last LineCycle | AVG 400.082
VLOAD Previous LineCycle | AVG 400.082
VSRC | MIN 114.274 MAX 114.275 RMS 114.274
Measured Spec Values |
AC_Settling(LOAD) | PASS: Voltage across LOAD has settled to (7.53023n) % and is less than or equal to Max Settling Spec of (10m) %
Max_VLOAD | PASS: Max. Output1 Voltage (400.171) is less than or equal to Max. Output1 Voltage Spec (420)
LOAD VLOAD ILOAD
SXGPH File | simplis_tran1_32.sxgph
SRC VSRC ISRC
SXGPH File | simplis_tran1_27.sxgph
Other SXGPH Files |
AC#tran | simplis_tran1_1.sxgph
SIGNAL#tran | simplis_tran1_6.sxgph
default#11#tran | simplis_tran1_11.sxgph
RAMP#tran | simplis_tran1_20.sxgph